X-Git-Url: http://git.rrze.uni-erlangen.de/gitweb/?p=LbmBenchmarkKernelsPublic.git;a=blobdiff_plain;f=doc%2Fmain.html;fp=doc%2Fmain.html;h=89f4676419cf6af9d3fb9a59d4e0cf4e98ee694d;hp=dfd45ecc93a1b4bea8ec14e1fd029069ba807551;hb=9e0051cb083e4d8575cbd9f4a41d11552358e151;hpb=8cafd9ea08a6b1103eab29811227a7ae536dffa6
diff --git a/doc/main.html b/doc/main.html
index dfd45ec..89f4676 100644
--- a/doc/main.html
+++ b/doc/main.html
@@ -592,7 +592,7 @@ make clean-all
OPENMP |
on, off |
on |
-OpenMP, i.,e.. threading support. |
+OpenMP, i.e. threading support. |
PRECISION |
dp, sp |
@@ -637,6 +637,22 @@ make clean-all
+ADJ_LIST_MEM_TYPE |
+HBM |
+
+ |
+Determines memory location of adjacency list array, DRAM or HBM. |
+
+PDF_MEM_TYPE |
+HBM |
+
+ |
+Determines memory location of PDF array, DRAM or HBM. |
+
SOFTWARE_PREFETCH_LOOKAHEAD_L1 |
int >= 0 |
0 |
@@ -1153,7 +1169,6 @@ which mimics the kernels memory access pattern and the kernel's loop balance
Skylake, Intel Xeon Gold 6148
-NOTE: currently we only use AVX2 intrinsics.
- Skylake server architecture, AVX2, AVX512, 2 FMA units
- 20 cores, 2.4 GHz
@@ -1225,11 +1240,11 @@ which mimics the kernels memory access pattern and the kernel's loop balance
|
-Skylake, Intel Xeon Gold 6148, Double Precision, NOTE: currently we only use AVX2 intrinsics. |
+
Skylake, Intel Xeon Gold 6148, Double Precision |
|
-Skylake, Intel Xeon Gold 6148, Single Precision, NOTE: currently we only use AVX2 intrinsics. |
+
Skylake, Intel Xeon Gold 6148, Single Precision |
|
@@ -1280,7 +1295,7 @@ Roofline: an insightful visual performance model for multicore architectures.
Commun. ACM, 52(4):65-76, Apr 2009. doi:10.1145/1498765.1498785
-Document was generated at 2018-05-10 14:10.
+Document was generated at 2018-05-22 10:11.